Ultra-low-power variable-resolution successive approximation ADC for biomedical application

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Please use this identifier to cite or link to this item: http://hdl.handle.net/1959.3/194435

Title: Ultra-low-power variable-resolution successive approximation ADC for biomedical application
Author(s): Le, H. P.; Singh, J.; Hiremath, L.; Mallapur, V.; Stojcevski, A.
Abstract: An ultra-low-power variable-resolution successive approximation analogue-to-digital converter (ADC) is presented. A novel binary search algorithm architecture is proposed to replace the conventional digital-to-analogue converter to significantly reduce system area and power consumption. The proposed ADC consumes less than 22.2 μW of power at a conventional 2 V battery supply with a sampling rate of 200 samples/s, and standby power consumption of less than 1 μW.
Publication type: Journal article
Source: Electronics Letters, Vol. 41, no. 11 (May 2005), pp. 634-635
Publication year: 2005
FOR Code(s): 0906 Electrical and Electronic Engineering
Keyword(s): Algorithms; Analog to digital conversion; Approximation theory; Binary search; Biomedical engineering; Chip area; Clock cycles; Control equipment; Digital flip-flop; Electric power utilisation; Flip flop circuits; Sampling; Signal processing
Publisher: The Institution of Engineering and Technology
ISSN: 0013-5194
Publisher URL: http://dx.doi.org/10.1049/el:20050490
Peer reviewed