Please use this identifier to cite or link to this item: http://hdl.handle.net/1959.3/240029

Title

AES S-box using Fermat's Little Theorem for the highly constrained embedded devices

Author(s)

Wong, M. M.;  Wong, M. L. D.;  Nandi, A. K.;  Hijazin, I.

Abstract

The recent increase of resource-constrained embedded devices have led to the need of lightweight cryptography. Therefore, the design of secure communication algorithms that fit in this highly constrained environments has become a fundamental issue in cryptographic circuit design. In this paper, we propose an optimization methodology that would efficiently reduces the code size of the S-box, the most expensive operation of the Advanced Encryption Standard (AES). Here, we perform a study on composite field AES S-box constructed using an inversion algorithm based on Fermat's Little Theorem (FLT). Consequently, we derive two AES S-box constructions over the fields GF((2 4) 2) and GF((2 2) 4) respectively. Our methodology results in smaller computational cost compared to the conventional Look-up Table (LUT) method, which is commonly deployed on microcontrollers.

Publication type

Conference paper

Research centre

Swinburne University of Technology. Sarawak Campus

Research centre

Swinburne University of Technology. Faculty of Engineering and Industrial Sciences

Source

Proceedings of the 20th European Signal Processing Conference (EUSIPCO 2012), Bucharest, Romania, 27-31 August 2012, pp. 1039-1043

Publication year

2012

Keyword(s)

Advanced Encryption Standard;  AES;  Fermat's Little Theorem;  FLT;  Lightweight implementation;  Microcontroller;  MCU;  S-box

Publisher

IEEE

ISSN

2219-5491 (series ISSN)

ISBN

9781467310680, 1467310689

Publisher URL

http://ieeexplore.ieee.org/

Copyright

Copyright © 2012 EURASIP.

Peer reviewed